CSIR CEERI Recruitment 2026 – Apply Online for 10 Project Associate, Project Associate and More Posts

Central Electronics Engineering Research Institute (CSIR-CEERI) has announced 10 vacancies for Project Staff Positions on a purely temporary engagement for various ongoing projects. The engagement is initially for six months or co-terminus with the present project, with pay and qualification requirements varying by post as specified in the official notification. Eligible candidates can apply through the online portal available on the CSIR-CEERI website from 16.10.2026 to 02.11.2026, and must take a printout of the application form after successful submission. The selection process involves screening of applications by a duly constituted Standing Screening Committee followed by an online interview through “Microsoft Teams” for shortlisted candidates.

CSIR CEERI Recruitment 2026 at a Glance

Vacancy Details

Who Can Apply

Post Code 3413: PAT-II & Senior PAT

For PAT-II: M.Tech/ M.E in Electronics and Communication Engineering/ Microwave; OR B.Tech/ B.E in Electronics and Communication Engineering/ Microwave and 2 years experience in R&D; OR M.Sc in Physics/ Electronics/ Optoelectronics/ Microwave and 2 years experience in R&D.

Senior PAT: M.Tech/ M.E in Electronics and Communication Engineering/ Microwave; OR B.Tech/ B.E in Electronics and Communication Engineering/ Microwave and 2 years experience in R&D; OR M.Sc in Physics/ Electronics/ Optoelectronics/ Microwave and 3 years experience in R&D.

Post Code 3414: Project Assistant-II & PAT-I

For Project Assistant-II: B.Sc/ 3 years diploma in engineering & technology (ECE/ EE/ Physics/ Electronics/ Material Science) or equivalent. Desirable: Working knowledge of embedded systems, knowledge of PCB design, programming skills in Arduino, knowledge of circuit design.

For PAT-I: B.E/ B.Tech/ M.Sc (Electronics/ ECE/ EEE/ Electronics & Instrumentation/ Electrical Engineering/ Electronics & Telecommunication/ Microwave/ Mechatronics/ MEMS/ Physics) or equivalent. Desirable: Working knowledge of embedded systems, knowledge of PCB design, Microcontroller programming, programming skills in Arduino knowledge of circuit design, PCB design.

Post Code 3415: JRF, Project Associate-I, or Project Associate-II

For JRF: Graduate degree/B.E./B.Tech./Post Graduate degree/ M.E./M.Tech. in Electronics, Electrical Engineering, Electrical & Electronics Engineering, Electronics & Communication Engineering, Electronics & Instrumentation, Computer Science, or equivalent discipline. Additionally, candidates must have been selected through any one of the following: (a) National Eligibility Tests such as CSIR-UGC NET (including Lectureship/Assistant Professorship) or GATE; OR (b) National-level examinations conducted by Central Government Departments and their Agencies/Institutions such as DST, DBT, DAE, DOS, DRDO, MoE, ICAR, ICMR, IITs, IISc, IISERs, NISER, etc.

For Project Associate – I: B.E./B.Tech. in Electrical Engineering, Electronics Engineering, Electrical & Electronics Engineering, Electronics & Communication Engineering, Electronics & Instrumentation, Computer Science, or equivalent discipline.

For Project Associate – II: B.E./B.Tech. in Electrical Engineering, Electronics Engineering, Electrical & Electronics Engineering, Electronics & Communication Engineering, Electronics & Instrumentation, Computer Science, or equivalent discipline with a minimum of 2 years’ experience in Research & Development in industrial/academic institutions or science & technology organizations, including scientific activities and services. OR Master’s / Integrated Master’s Degree in Electronics, Electrical Engineering, Electrical & Electronics Engineering, Electronics & Communication Engineering, Electronics & Instrumentation Engineering, Computer Science, or equivalent discipline.

Post Code 3416: Project Scientist-I

Doctoral Degree in Science or Master’s Degree in engineering or technology from recognized university or equivalent. Preferable : experience in integrated circuit design flow, hardware accelerators, sensor interface circuit design, analog design, HDLs, and EDA tools such as cadence, synopsys etc.

Post Code 3417: Project Scientist-II

Doctoral Degree in Science or Master’s Degree in engineering or technology from recognized university or equivalent, and 3 years experience in R&D in industrial and academic institutions or S&T organizations, along with scientific activities and services. Preferable : Experience in integrated circuit design flow, hardware accelerators, sensor interface circuit design, analog design, HDLs, and EDA tools such as cadence, synopsys etc.

Post Code 3418: Project Associate-I (PAT-I)

Four years B.Tech/ B.E in electronics/ electronics and communication/ electrical/ electrical and electronics or M.Sc in electronics or equivalent from recognized university or equivalent. Preferable : Experience in integrated circuit design flow, hardware accelerators, sensor interface circuit design, analog design, HDLs, and EDA tools such as cadence, synopsys etc. Candidates with above qualification without experience can also apply they shall be eligible for the position of PAT-I.

Age Limit

Age Relaxation: 5 years of relaxation for SC/ST/PwD/Women and 3 years for OBC.

Pay and Tenure

HRA will be admissible as per CSIR guidelines and subject to availability of funds in the project.

How to Apply for CSIR CEERI Recruitment 2026

1. Read the instruction given on the CSIR-CEERI Website on Project Staff Recruitment Page.
2. Apply through online portal available on CSIR-CEERI website.
3. Upload scanned copies of required academic certificates (10th Standard, 12th Standard, Diploma Degree, Graduation Degree, Post-Graduation), Date of Birth Proof, category certificate, NET/GATE/equivalent exam qualification certificate, experience certificate, and other certificates.
4. Submit the online application before the last date.
5. Take a print out of the Application Form after successfully submission of the form.

Selection and Interview

Received applications will be screened by duly constituted Standing Screening Committee. Shortlisted candidates will be informed through ‘E-mail/Institute website’ along with the date and time for interview. Candidates will have to appear for the interviews through “Microsoft Teams” (MS Teams) as a Guest, for which the link will be sent to your registered Email. The selected candidates are expected to join immediately upon selection and bring with them all ORIGINAL TESTIMONIALS including application form, mark sheets & certificates and also a passport size photograph at the time of joining, failing which their engagement can be withdrawn.

Important Dates

Important Links