IIT Gandhinagar Project Engineer Recruitment 2026 – Apply Online

Advt No SPON/10455/Advt0368
Recruitment Board IIT Gandhinagar
Post Name Project Engineer (ESD Device Design and Development)
Vacancies 1
Last Date 12-11-2026

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The Indian Institute of Technology Gandhinagar has one Project Engineer (ESD Device Design and Development) post in the EE department under the Silicon and Advanced Semiconductor Manufacturing Research and Training Hub (SAMARTH), for one year initially, with a consolidated pay of INR 60,000 – 1,25,000 per month including HRA, depending on qualification and experience. Applicants need a Ph.D., or an M.Tech./M.S. with at least 2 years of post-qualification experience, in an appropriate discipline, and must apply online through the IIT Gandhinagar project staff recruitment portal by 12 November 2026.

IIT Gandhinagar Recruitment 2026 at a Glance

Particulars Details
Organisation Indian Institute of Technology Gandhinagar (Research & Development Office)
Advertisement No. SPON/10455/Advt0368
Department EE
Project Silicon and Advanced Semiconductor Manufacturing Research and Training Hub (SAMARTH)
Tenure One year initially, extendable on satisfactory performance up to the project completion date
Post Name(s) Project Engineer (ESD Device Design and Development)
Vacancies One (1)
Pay INR 60,000 – 1,25,000 per month (consolidated, including HRA), depending on qualification and experience
Job Location SAMARTH, IIT Gandhinagar
Application Mode Online
Last Date to Apply 12 November 2026

The official notification does not specify the age limit or the application fee.

About IIT Gandhinagar

The Indian Institute of Technology Gandhinagar is a technical institute in Gandhinagar, and this post is advertised by its Research & Development Office. The post serves the Silicon and Advanced Semiconductor Manufacturing Research and Training Hub (SAMARTH) at IIT Gandhinagar, under the Principal Investigator Nihar Ranjan Mohapatra, Professor, EE. The work centres on the design, simulation, tapeout and testing of advanced ESD protection devices.

Who Can Apply

Eligibility for this post is governed by Institute norms (the notice marks Institute norms, not Funding Agency norms).

Essential Qualification and Experience

  • Ph.D. or equivalent in an appropriate discipline with a very good academic record throughout.
  • OR M.Tech./M.S. or equivalent in an appropriate discipline with at least 2 years of post-qualification experience in teaching, research, industry or design in an organization of repute.
  • In addition: minimum 60% marks or equivalent grade from graduation onwards, and 55% or equivalent grade in Class 10 and Class 12.

Desirable Qualification and Experience

  • TCAD & Device Physics: 2D/3D TCAD modeling (e.g., Synopsys Sentaurus) of ESD structures, including snapback, avalanche breakdown, current crowding and lattice heating.
  • ESD Device Layout & Tapeout: ESD protection device and clamp design, custom layout, DRC/LVS verification and GDSII tapeout.
  • PCB & Test Fixture Design: Design of low-parasitic, high-voltage PCBs and test fixtures (e.g., Altium, KiCad) for TLP and ESD characterization.
  • Testing & Failure Analysis: TLP/VF-TLP, HBM/CDM and IEC 61000-4-2/-4-5 testing, hotspot detection and physical failure analysis.
  • Programming & Automation: Python scripting for instrument control, test automation and data analysis.

The notice does not mention an age limit for this post. Candidates should check the official notification for the full eligibility of the post.

Pay and Tenure

The Project Engineer receives a consolidated monthly remuneration of INR 60,000 – 1,25,000 per month, which already includes HRA. The exact amount within this range depends on qualification and experience. The notice gives the separate House Rent Allowance per month as NIL.

The appointment is for one year initially. It is extendable on satisfactory performance up to the project completion date.

IIT Gandhinagar Recruitment 2026 Job Description

The Project Engineer will lead the design, simulation, tapeout and testing of advanced ESD protection devices at SAMARTH, IIT Gandhinagar. The key responsibilities printed in the notice are:

  • TCAD Modeling & Simulation: Developing and calibrating 2D/3D TCAD models of ESD devices to simulate snapback, breakdown and thermal behavior under high-current stress.
  • ESD Device Design & Tapeout: Translating device specifications into layouts, co-designing ESD protection circuits, running DRC/LVS and preparing GDSII files for fabrication.
  • Package- and Board-Level Co-Design: Optimizing ESD protection across device, package and board to minimize parasitic inductance and capacitance.
  • PCB Test Board Development: Designing multi-layer, low-parasitic PCBs and test fixtures for fast-transient and high-voltage testing.
  • ESD Characterization & Stress Testing: Conducting TLP, VF-TLP, HBM/CDM and IEC 61000-4-2 testing to extract on-resistance, clamping voltage and failure current (It2).
  • Failure Analysis & Debugging: Identifying root causes of failure, including current filamentation, snapback instability and thermal damage.
  • Automation & Reporting: Writing Python scripts for automated test set-ups and data extraction, and preparing technical reports.
  • Training & Lab Support: Supporting SAMARTH’s training programs and the operation of the ESD characterization lab.

How to Apply for IIT Gandhinagar Recruitment 2026

Applications are made online through the application link given in the notice, the IIT Gandhinagar project staff recruitment portal (recruitment.iitgn.ac.in/projectstaff). The last date of application submission is 12 November 2026. The notice does not list any documents to attach or any further steps.

For queries, the notice names the Principal Investigator as the contact: Nihar Ranjan Mohapatra, Professor, EE, email [emailΒ protected].

Selection and Interview

The notice states that merely meeting the minimum eligibility criteria will not guarantee shortlisting or appointment, and that a higher cutoff level may be used. The Institute reserves all rights not to call an applicant for a selection test, or not to fill up the position through this round of selection, without assigning any reason. The notice does not give the date or mode of the selection test.

Important Links

Link Details
Apply Online – IIT Gandhinagar Project Staff Portal Online application, open until 12 November 2026
Official Notification PDF (SPON/10455/Advt0368) Project Engineer (ESD Device Design and Development) notice
IIT Gandhinagar Official Website Institute website

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